1. Field of the Invention
The present invention relates to a method of repairing bit errors which occur in nonvolatile semiconductor memories due to a read disturb or the like, and relates to an information processing apparatus for achieving the repair method.
2. Description of the Background Art
Nonvolatile semiconductor memories such as flash memories are heavily used for SD memory cards or the like for the purpose of achieving high integration, reduction in manufacturing cost and easy writing for users by simplifying circuit configurations and in recent, greatly adopted for game machines or the like.
In the game machines or the like, however, since flash memories are used like ROMs and specific data which are stored are repeatedly read out, it begins to be noticed that there is a possibility that bit data which are stored should change to cause errors and this should invite trouble. Such a phenomenon is termed “read disturb”, and the mechanism of this phenomenon will be briefly discussed below.
FIG. 6 is a schematic diagram showing a NAND flash memory. The NAND flash memory is constituted of a bit line 41 and word lines 42, 43 and 44 which are arranged in a lattice manner, memory cells 52 and 53, a selection register 54 and the like.
For example, in a case where 1-bit data (bit data) of “0” or “1” stored in the memory cell 52 is read out, the memory cell 52 is a selected cell and the memory cell 53 is an unselected cell. First, the selection register 54 specifies the bit line 41 to which the selected cell 52 belongs. Next, a low gate voltage V(Low), e.g., 0 V, is applied to the word line 42 to which the selected cell 52 belongs. Then, a high gate voltage V(High), e.g., 5V, is applied to the word line 43 to which the unselected cell 53 belongs.
At that time, there is a possibility that electrons might be accumulated in a floating gate of the unselected cell 53. In other words, when bit data stored in the selected cell 52 is repeatedly read out, there is a possibility that electrons might be trapped and accumulated in the unselected cell 53 with time and bit data stored in the unselected cell 53 might be unintendedly rewritten, being changed from “1” to “0”, to cause an error.
Even if the bit data stored in the unselected cell 53 is unintendedly rewritten, however, when data is erased from or written into the unselected cell 53, the unselected cell 53 can be recovered. But, if there occurs no write or erase operation in the unselected cell 53, the bit data in the unselected cell 53 is held with the error, and therefore trouble is caused when a program associated with the unselected cell 53 is executed.
Specifically, herein, a bit error refers to a reversible error caused by a change of the bit data stored in the cell with time, not an irreversible error due to a physical damage. Above all, the bit error due to the read disturb (i.e., read disturb error) is caused by repeated read operations in a specified memory area of a flash memory with no write or erase operation.
US Patent Application Publication No. 2005/0210184 discloses a technique to avoid the read disturb error. In this document, however, the bit error is avoided by controlling the inside of a memory cell.
Generally, flash memories are each provided with an error correction function. If data which is read out has any error, this error correction function corrects the error and outputs correct data. As the error correction function, for example, ECC (Error Check and Correct) is used. In the case of using the function of ECC, by installing an ECC (Error-Correcting Code) in a flash memory in advance, even when an error (including a bit error) occurs in the flash memory, if it is an error of several bits, the error can be checked and corrected before data is read out. Even if the stored data has any error, correct data is read out and therefore the reliability of the flash memory is ensured. In one case, for example, where 8-bit error correcting code is set for 64-bit data, when an error occurs, if it is an error of 1 bit, data can be outputted with the error corrected.
The bit error, however, occurs in the unselected cell around the selected cell in e.g., NAND flash memories, as discussed above. Therefore, it is very difficult to identify the location and the number of errors and there is a possibility that a lot of errors might occur. For this reason, it is thought that the risk to cause trouble beyond the correction capability of the conventional error correction function such as ECC is high. Further, this type of error correction function usually corrects only the error of data to be outputted but can not repair the nonvolatile semiconductor memories.
If repair of the nonvolatile semiconductor memories is done, it is a very important problem when to repair the memories, from the viewpoint of product characteristics. If the repair of the nonvolatile semiconductor memory is done during execution of a game, for example, a stress is imposed on the read operation of the game program to cause suspension or delay of the game, and this invites very uncomfortable conditions to users.